The present invention relates to an image reader for a facsimile apparatus or like image processing apparatus and, more particularly, to an image reader capable of preventing noise from being introduced in signals by use of a store type amorphous silicon line image sensor.
Image reading means heretofore installed in an image processing apparatus is implemented with a line image sensor, as in an image reader section of a facsimile terminal. The line image sensor is constructed and arranged to photoelectrically transduce one line of images on a pixel basis. Generally, a line image sensor comprises a light-sensitive section where a plurality of photoelectric transducer elements such as photodiodes are arranged in an array, and a drive section adapted to sequentially select and deliver output signals of the photoelectric transducer elements. Recently, a so-called store type amorphous silicon line image sensor has been put to practical use which has as its photoelectric transducer elements photodiodes that are made of amorphous silicon. In an image reader of the kind using a store type amorphous silicon line image sensor, since the light-sensitive surface of each photoelectric transducer element can be dimensioned as small as an actual pixel, images on a document need only to be focused in their actual size onto the line image sensor. This advantage leads to a small-size image reader construction.
A basic construction of such a store type amorphous silicon line image sensor is shown in FIG. 1.
In the illustrated image sensor, generally 10, a capacitance Cd represents a coupling capacitance of a photodiode, or photoelectric transducer, PD, while C.sub.L represents a capacitance developing in a wiring between the photodiode PD and a circuit to follow (e.g. amplifier). A resistor R is a current-limiting resistor. A switch SW comprises a MOS (metal oxide semiconductor) switch or like semiconductor element. A voltage V.sub.D is applied to the line image sensor 10 from a power source, not shown.
Assume that the switch SW is turned on to charge the capacitances Cd and C.sub.L and turned off to set up an image signal storing condition. In this condition, a photocurrent Ip complementary to a quantity of received light, i.e., a pixel luminance associated with a read image, develops in the photodiode PD to discharge the capacitance Cd. When the switch SW is turned on again, the photodiode PD produces an output voltage Vout which based on charge conservation is expressed as: EQU Vout=V.sub.D -(Ip.multidot.T/(Cd+C.sub.L)) Eq. (1)
where T is the interval between consecutive turnons of the switch SW, or image information storing period).
Meanwhile, in the case where the whole charge stored in the capacitance Cd is discharged by the photocurrent Ip which has flown over the storing time T, the output voltage Vout of the photodiode, or saturation output Vsat, is produced by: EQU Vsat=C.sub.L .multidot.V.sub.D /(C.sub.L +Cd) Eq. (2)
Hence, the output Vout of the photodiode PD varies from the source voltage V.sub.D to Vsat complementarily to the photocurrent Ip which has flown over the storing time, i.e. luminance of the associated pixel. In this manner, image signals corresponding to pixel densities are provided.
The store type amorphous silicon line image sensor may be designed to read an A4 format document, which has a reading width of 216 millimeters, eight dots per millimeter by way of example. In this type of image sensor, 1728 photodiodes PD each having a light-sensitive area substantially equal in dimensions to a pixel are arranged at equal intervals in correspondence with the reading width; switches SW are connected in one-to-one correspondence and serially to the photodiodes PD. Where this type of line image sensor is driven as a single element, the capacitance C.sub.L increases to a significant level. The Eq. (2) teaches that an increase in the capacitance C.sub.L is reflected by a decrease in the level of the saturation output Vsat which in turn narrows the available dynamic range.
An implementation heretofore employed to preserve a desirable dynamic range consists in dividing the photoelectric transducer elements of a line image sensor into a plurality of blocks and driving them on a block basis. An example of such a prior art arrangement is shown in FIG. 2 together with a drive section associated therewith.
In FIG. 2, photodiodes PD which constitute a line image sensor 20 are divided into n discrete blocks BL1 to BLn each having m photodiodes. In each of the blocks BL1 to BLn, cathodes of the photodiodes PD are connected to a bias power source E.sub.B via a common resistor R, and anodes to a reference voltage point (ground point in this case) via their associated switches which constitute a switch array 22, i.e. switches SW11 to SW1m, SW21 to SW2m, . . . , SWnl to SWnm. The output of the blocks BL1 to BLn respectively are coupled to selection switches SL1 to SLn which serve in combination as an analog multiplexer 24. The output signal Va of the analog multiplexer 24 is amplified by an amplifier 26, then fed through a capacitor 28 to a DC regenerator circuit 30 for level conversion, then sampled by a sample-hold circuit 32 as image signals which are associated with the individual pixels, and then applied to the next device. A controller 34 prepares control signals SC1 to SC4 adapted to control the operation timings of the switch array 22, analog multiplexer 24, DC regenerator circuit 30 and sample-hold circuit 32, respectively.
In the above construction, one line of image signals are produced by the following procedures. First, the controller 34 produces a control signal SC2 to turn on the selection switch SL1 to thereby select the block BL1 (see waveforms a and b shown in FIG. 3). Simultaneously, the controller 34 produces a control signal SC1, which is a pulse signal having a predetermined period (see waveform e shown in FIG. 3), and applies it to the switch array 22 so as to sequentially turn on the switches SW11 to SL1m of the block BL1 (see waveforms f, g, h and i of FIG. 3). Then, the analog multiplexer 24 produces, at the period of the control signal SC1, signals Va representative of respective pixels associated with the particular block BL1 (see waveform q of FIG. 3).
After the controller 34 has produced m control signals SC1 to fully read the block BL1, it produces a control signal SC2 at the timing of the "m+1" control signals SC1 to turn off the selection switch SL1 and turn on the selection switch SL2 (see waveform c of FIG. 3), thereby selecting the block BL2. Since control signals SC1 are continuously produced, the switches SW21 to SW2m in the switch array 22 are sequentially turned on (see waveforms j, k, l and m of FIG. 3) so that the analog multiplexer 24 delivers signals Va representative of pixels associated with the block BL2 at the period of the control signals SC1.
Thereafter, the controller 34 produces a control signal SC2 at the timing of the "2m+1" control signal SC1 to turn off the selection switch SL2 of the analog multiplexer 24 and turn on the selection switch SL3 (see waveform d of FIG. 3), thereby selecting the block BL3. In thic condition, the switches SW31 to SW3m in the switch array 22 are sequentially turned on by the control signals SC1 (see waveforms n, o and p of FIG. 3) with the result that the analog multiplexer 24 delivers signals Va representative of pixels associated with the block BL3 at the period of the control signals SC1.
A procedure similar in principle to the above described one will be repeated to sequentially select the other consecutive blocks BL4 to BLn and, thereby, fully produce one line of image signals Va.
A control signal SC3 is generated at such a timing that a signal level immediately before the appearance of a signal representative of a pixel is sampled by the DC regenerator circuit 30 as a reference level for level conversion. A control signal SC4 on the other hand is generated with a predetermined delay relative to the control signal SC1.
The problem with the prior art arrangement as discussed above is that every time the analog multiplexer 24 switches the blocks BL1 to BLn from one to another, switching noise NZ due to the operation of any of the switches SL1 to SLn is superposed on the image signal Va, as shown in the waveform q of FIG. 3. The switching noise NZ degrades the signal-to-noise (S/N) ratio of the image signals Va and, thereby, reproduced images.